This invention relates, in general, to microprocessors, and more particularly, to those microprocessors having an on-chip random access memory (RAM).
Microprocessors have gained wide acceptance and have proven very useful in many applications. In most cases, a microprocessor is used in conjunction with external memories which contain instructions and op-codes. Advances in LSI techniques have allowed inclusion of memories on the same chip as a microprocessor; however, the memories had limited utility since they were mainly used for temporary storage of data. It would be highly desirable to have a random access memory (RAM) located on the same integrated circuit chip as the microprocessor and interconnected in a manner to allow data from the RAM to be coupled onto the internal microprocessor data bus. In addition, in many applications it is desirable to be able to retain some of the information contained in the RAM when the microprocessor power is down. This is particularly true of microprocessors used in automobiles.
Accordingly, it is an object of the present invention to provide circuitry to interconnect a RAM to a microprocessor internal data bus wherein both, RAM and microprocessor, are on the same chip to permit data from the RAM to be inputted to the microprocessor internal data bus.
Another object of the present invention is to provide the capability which allows a microprocessor to read the contents of a RAM onto an internal microprocessor data bus and to an external data bus which is external to the microprocessor.
Yet another object is to provide a single integrated circuit chip having a microprocessor and a RAM wherein the RAM contains instructions.
A further object of the present invention is to provide a method by which the contents of a RAM can be coupled to a microprocessor instruction register via an internal data bus of the microprocessor.